xilinx virtex-7系列的fpgas突破了以前的物理限制，使明天的
創(chuàng)新。超高端帶寬和容量的結(jié)合提高了系統(tǒng)性能
解決最復雜的系統(tǒng)需求。不折不扣的表現(xiàn)是
一個可編程平臺的基礎，具有多功能性，在當今
競爭激烈的市場。
前所未有的吞吐量
virtex-7fpgas擁有多達96個先進的串行收發(fā)器，使設計者能夠在這方面取得突破性進展。
下一代通信解決方案的帶寬。先進的吞吐量使
網(wǎng)絡基礎設施的空前發(fā)展，包括
NX100G和400G光纖網(wǎng)絡。
新的績效里程碑
virtex-7fpgas提供高達200萬個邏輯單元和超過5tmacs的dsp吞吐量。這些
資源支持大規(guī)模并行數(shù)據(jù)處理體系結(jié)構(gòu)，這些體系結(jié)構(gòu)對每個
時鐘周期。virtex-7fpgas擁有多達88個高級串行收發(fā)器，可提供超過4bps的串行
帶寬。這些能力使先進雷達的處理性能達到了新的水平，
高性能計算和先進的醫(yī)學成像系統(tǒng)。
超越摩爾定律
Xilinx率先采用SSI技術(shù)，以實現(xiàn)超過速度的容量和性能增長
摩爾定律。因此，virtex-7fpgas提供的容量是之前的3.5倍以上。
世代。結(jié)合家族的內(nèi)存、dsp和i/o資源，virtex-7設備建立了新的
績效基準。
低功耗設計
業(yè)界領(lǐng)先的28nm HPL工藝技術(shù)實現(xiàn)了性能和功率的最佳平衡
對于這些下一代的fpgas。架構(gòu)增強進一步降低了I/O功耗
同時增加帶寬。以及xilinx設計工具軟件中的智能時鐘選通算法
降低有功功耗。
The Xilinx Virtex-7 Family of FPGAs breaks through previous physical limits to enable tomorrow’s
innovations. A combination of ultra high-end bandwidth and capacity boosts system performance to
address the most complex system requirements. The uncompromised performance is delivered as the
foundation of a programmable platform, with the versatility to maximize differentiation in today’s
competitive markets.
Unprecedented Throughput
With up to 96 advanced serial transceivers, the Virtex-7 FPGAs enable designers to build breakthrough
bandwidth into next-generation communications solutions. The advanced throughput enables
unprecedented advancements for network infrastructure, including the only single-FPGA solution for
Nx100G and 400G optical networking.
New Milestones in Performance
Virtex-7 FPGAs deliver up to 2 million logic cells and more than 5TMACS DSP throughput. These
resources enable massively parallel data processing architectures that perform more work with each
clock cycle. With up to 88 advanced serial transceivers, Virtex-7 FPGAs offer more than 4Tbps of serial
bandwidth. These capabilities enable new levels of processing performance for advanced RADAR,
high-performance computing, and advanced medical imaging systems.
Exceeding Moore’s Law
Xilinx pioneered SSI technology to achieve increases in capacity and performance that exceed the pace
of Moore’s Law. As a result, Virtex-7 FPGAs offer more than 3.5 times the capacity of the previous
generation. Combined with the family’s memory, DSP, and I/O resources, Virtex-7 devices establish new
performance benchmarks.
Low Power by Design
Industry-leading 28nm HPL process technology achieves the optimum balance of performance and power
for these-next generation FPGAs. Architectural enhancements further reduce I/O power consumption
while increasing bandwidth. And intelligent clock-gating algorithms in Xilinx design tool software further
reduce active power consumption.
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