TLV320AIC3101IRFeatures • Extensive Modular Power Control • Power Supplies: 1• Stereo Audio DAC – 102-dBA Signal-to-Noise Ratio – Analog: 2.7 V–3.6 V. – 16/20/24/32-Bit Data – Digital Core: 1.525 V–1.95 V – Supports Sample Rates From 8 kHz to 96 kHz – Digital I/O: 1.1 V–3.6 V – 3D/Bass/Treble/EQ/De-Emphasis Effects • Package: 5-mm × 5-mm 32-Pin QFN – Flexible Power Saving Modes and 2 Applications Performance are Available • Digital Cameras • Stereo Audio ADC • Smart Cellular Phones – 92-dBA Signal-to-Noise Ratio – Supports Sample Rates From 8 kHz to 96 kHz 3 Description – Digital Signal Processing and Noise Filtering The TLV320AIC3101 is a low-power stereo audio Available During Record codec with stereo headphone amplifier, as well as • Six Audio Input Pins multiple inputs and outputs that are programmable in – One Stereo Pair of Single-Ended single-ended or fully differential configurations. Inputs Extensive register-based power control is included, – One Stereo Pair of Fully Differential Inputs enabling stereo 48-kHz DAC playback as low as 14 • Six Audio Output Drivers mW from a 3.3-V analog supply, making it ideal for – Stereo Fully Differential or Single-Ended portable battery-powered audio and telephony Headphone Drivers applications. – Fully Differential Stereo Line Outputs The record path of the TLV320AIC3101 contains integrated microphone bias, digitally controlled stereo – Stereo 8-Ω, 500-mW/Channel Speaker Drive microphone preamplifier, and automatic gain control Capability (AGC), with mix/mux capability among the multiple • Low Power: 14-mW Stereo 48-kHz Playback With analog inputs. Programmable filters are available 3.3-V Analog Supply during record which can remove audible noise that • Ultralow-Power Mode With Passive Analog can occur during optical zooming in digital cameras. Bypass The playback path includes mix/mux capability from the stereo DAC and selected inputs, through • Programmable Input/Output Analog Gains programmable volume controls, to the various • Automatic Gain Control (AGC) for Record outputs. • Programmable Microphone Bias Level Device Information(1) • Programmable PLL for Flexible Clock Generation PART NUMBER PACKAGE BODY SIZE (NOM) • I 2C Control Bus TLV320AIC3101 VQFN (32) 5.00 mm x 5.00 mm • Audio Serial Data Bus Supports I 2S, Left/RightJustified, DSP, and TDM Modes
6 Description (continued) The TLV320AIC3101 contains four high-power output drivers as well as two fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended 16-Ω headphones using ac-coupling capacitors, or stereo 16-Ω headphones in a capless output configuration. In addition, pairs of drivers can be used to drive 8-Ω speakers in a BTL configuration at 500 mW per channel. The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1- kHz, and 48-kHz sample rates. The stereo audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers or AGC that can provide up to 59.5-dB analog gain for low-level microphone inputs. The TLV320AIC3101 provides an extremely high range of programmability for both attack (8–1,408 ms) and for decay (0.05–22.4 seconds). This extended AGC range allows the AGC to be tuned for many types of applications. For battery saving applications where neither analog nor digital signal processing are required, the device can be put in a special analog signal passthrough mode. This mode significantly reduces power consumption, as most of the device is powered down during this passthrough operation. The serial control bus supports the I 2C protocol, whereas the serial audio data bus is programmable for I 2S, left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most-popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks. The TLV320AIC3101 operates from an analog supply of 2.7 V–3.6 V, a digital core supply of 1.525 V–1.95 V, and a digital I/O supply of 1.1 V–3.6 V. The device is available in a 5-mm × 5-mm 32-pin QFN package
TLV320AIC3101IR
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TLV320AIC3101IR
